VHDL Group

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Laboratory

Digital Circuit Design with VHDL

Teacher Assistants

1. Adrian Popa, M.S. in Automation and Computers, Group Leader of Power Train, Siemens VDO Automotive, Timisoara.

2. Tiberiu Ionica, M.S. in Automation and Computers, Assistant Professor, UPT.

3. Ana-Maria Dan, M.S. in Automation and Computers, Assistant Professor, UPT.

Summary

1. Introducing in VHDL: Active-VHDL

2. Compilation and simulation

3. Logical combinational circuits

4. Signal attributions

5. Finite state machine

6. Arbitration of external bus in a multiprocessor systems

7. Static RAM memory in VHDL

8. Design standard serial interface in VHDL

References

1. V.A. Pedroni, Circuit Design with VHDL, Massachusetts Institute of Technology, MIT Press, 2004.

2. D.L. Perry, VHDL Programming by Example (4th Ed.), McGraw-Hill Professional, 2002.

3. P.P. Chu, FPGA Prototyping by VHDL Examples: Xilinx Spartan-3 Version, Wiley-Interscience, 2008.

4. J. Mirkiwski et all., Interactive VHDL Tutorial, Active -VHDL Series - Evita, Rev.2.1, Aldec Inc., 1998.

5. A. Popa, F. Ocolisan, G.D. Andreescu, Computer Added Design of Complex Logical Circuits - VHDL Applications (in Romanian), Politehnica University of Timisoara, 2002.

6. XILINX Inc., http://www.xilinx.com.

7. ALTERA Corporation, http://altera.com.